cy25701 programmable high frequency crystal oscillator with spread spectrum (ssxo) and no spread spectrum (xo) option cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number: 001-07313 rev. *e revised march 23, 2010 features crystal oscillator with spread spectrum clock (ssxo) no spread spectrum (xo) option wide operating output clock frequency range of 10 to166 mhz programmable spread spectrum with nominal 31.5 khz modulation frequency center spread: 0.25% to 2.0% down spread: ?0.5% to ?4.0% no spread: 0.0% integrated phase-locked loop (pll) 85 ps typical cycle-to-cycle jitter with ssclk = 133 mhz 3.3v operation output enable function package available in 4-pin ceramic lcc smd pb-free package industrial temperature from ?40c to 85c benefits provides a wide range of spread percentages for maximum electromagnetic interference (emi) reduction to meet regulatory agency electromagnetic compliance (emc) require- ments. reduces development and manufacturing costs and time-to-market. this versatile programming featur e enables the user to switch between ssxo (with spread) and xo (without spread) functions with ease. internal pll to generate up to 166 mhz output. suitable for most pc, consumer, and networking applications application compatibility in standard and lo w power systems in house programming of sample s and prototype quantities is available using cy3672 programming kit and cy3724 socket adapters. production quantities are available through cypress?s value added distribution partners or by using third party programmers from bp microsystems, and hilo systems, and others. logic block diagram pll with modulation control programmable configuration output dividers and mux 1 4 2 vdd vss oe rfb c xout c xin 3 ssclk [+] feedback
cy25701 document number: 001-07313 rev. *e page 2 of 9 pinout figure 1. pin diagram - cy25701 4-pin ceramic smd functional description the cy25701 is a spread spectrum crystal oscillator (ssxo) ic used to reduce the emi found in today?s high speed digital electronic systems. the device uses a cypress proprietary pll and spread spectrum clock (ssc) technology to synthesize and modulate the frequency of the embedded input crystal. by frequency modulating the clock, the measured emi at the fundamental and harmonic frequencies are greatly reduced. this reduction in radiated energy significantly reduces the cost of complying with regulatory agency (emc) requirements and improves time-to-market without degr ading system performance. the cy25701 uses a programmable configuration memory array to synthesize output frequency and spread percentage. the spread percentage is programm ed to center spread or down spread with various spread percentages. the range for center spread is from 0.25% to 2.00%. the range for down spread is from ?0.5% to ?4.0%. contact the factory for smaller or larger spread percentage amounts if required. see table 3 on page 3 for spread selection and no spread values. the frequency modulated ssclk ou tput is programmable from 10 to 166 mhz. the cy25701 is available in a 4-pin ceramic smd package with an operating temperature range of ?40 to 85c. programming description factory and field programmable cy25701 factory and field programming is available for samples and manufacturing by cypress and its distributors. submit your request to the local cypress field application engineer (fae) or sales representative. once the re quest is processed, you receive a new part number, samples, and data sheet with the programmed values. this part number is used for additional sample request and the production orders. contact your local cypress fae or sales representative for details. additional information on the cy25701 is available at the cypress web site www.cypress.com. output frequency, ssclk output (ssclk, pin 3) the modulated frequency at t he ssclk output is produced by synthesizing from the embedded crystal oscillator frequency input. the range of synthesized clock is from 10 to 166 mhz. spread percentage (ssclk, pin 3) the ssclk spread is programmable to various spread percentage values from 0.25% to 2.0% for center spread and from ?0.5% to ?4.0% for down spread. see table 3 on page 3 for available spread options. enter 0.0% (no spread) for xo (crystal oscillator) without spread option. frequency modulation (ssclk, pin 3) the default frequency modulation is programmed at 31.5 khz for all ssclk frequencies from 10 to 166 mhz. alternate frequency modulations at 30.1 khz or 32.9 khz are selectable using cyberclocks? online software. contact the factory for other alternate modulation frequencies if required. table 1. pin definitions - cy25701 4-pin ceramic smd pin name description 1 oe output enable pin: active high . if oe = 1, ssclk is enabled 2 vss power supply ground 3 ssclk spread spectrum clock output (with or without spread) 4 vdd 3.3v power supply 4 vdd 3 ssclk oe vss 1 2 [+] feedback
cy25701 document number: 001-07313 rev. *e page 3 of 9 absolute maximum ratings supply voltage (vdd).... .............. .............. .....?0.5v to +7.0v dc input voltage ................................... ?0.5v to v dd + 0.5v storage temperature (non-con densing) .... ?55c to +100c junction temperature ................................ ?40c to +125c data retention at tj = 125 ? c .................................>10 years package power dissipation...................................... 350 mw table 2. programming data requirement pin function output frequency spread percent code [1] frequency modulation pin name ssclk ssclk ssclk pin# 3 3 3 units mhz % khz program value enter data enter data enter data 31.5 table 3. spread percent selection center spread code a b c d e f z percentage 0.25% 0.5% 0.75% 1.0% 1.5% 2.0% 0.0% down spread code g h j k l m z percentage ?0.5% ?1.0% ?1.5% ?2.0% ?3.0% ?4.0% 0.0% notes 1. 0.0% or code ?z? for xo (no-spread) option. 2. guaranteed by characterization, not fully tested. operating conditions parameter description min typ max unit v dd supply voltage 3.00 3.30 3.60 v t a ambient temperature (commercial) ?20 ? 70 c t a ambient temperature (industrial) ?40 ? 85 c c load max. load capacitance at pin 3 ? ? 15 pf f ssclk ssclk output frequency, c load = 15 pf 10 ? 166 mhz f mod spread spectrum modulation frequency 30.0 31.5 33.0 khz t pu power up time for vdd to reach minimu m specified voltage (power ramp must be monotonic) 0.05 ? 500 ms dc electrical characteristics parameter description condition min typ max unit i oh output high current (pin 3) v oh = v dd ? 0.5, v dd = 3.3v (source) 10 12 ? ma i ol output low current (pin 3) v ol = 0.5, v dd = 3.3v (sink) 10 12 ? ma v ih input high voltage (pin 1) cmos levels, 70% of v dd 0.7v dd ?v dd v v il input low voltage (pin 1) cmos levels, 30% of v dd ??0.3v dd v i ih input high current (pin 1) v in = v dd ??10 ? a i il input low current (pin 1) v in = v ss ??10 ? a i oz output leakage current (pin 3) three-state output, oe = 0 ?10 ? 10 ? a c in [2] input capacitance (pin 1) pin 1, or oe ? 5 7 pf i vdd supply current v dd = 3.3v, ssclk = 10 to 166 mhz, c load = 0, oe = v dd ??50 ma ? f/f initial accuracy at room temp. t a = 25c, 3.3v ?25 ? 25 ppm freq. stability over temp. range t a = ?20c to 70c, 3.3v ?25 ? 25 ppm freq. stability over voltage range 3.0 to 3.6v ?12 ? 12 ppm aging t a = 25c, first year ?5 ? 5 ppm [+] feedback
cy25701 document number: 001-07313 rev. *e page 4 of 9 ac electrical characteristics [2] parameter description condition min typ max unit dc output duty cycle ssclk, measured at v dd /2 45 50 55 % t r output rise time 20%?80% of v dd, c l = 15 pf ? ? 2.7 ns t f output fall time 20%?80% of v dd, c l = 15 pf ? ? 2.7 ns t ccj1 [3] cycle-to-cycle jitter ssclk (pin 3) ssclk ? 133 mhz, measured at v dd /2 ? 85 200 ps 25 mhz ?? ssclk <133 mhz, measured at v dd /2 ?215400ps ssclk < 25 mhz, measured at v dd /2 ? ? 1% of 1/ssck s t oe1 output disable time (pin1 = oe) time from falling edge on oe to stopped outputs (asynchronous) ?150350ns t oe2 output enable time (pin1 = oe) time from rising edge on oe to outputs at a valid frequency (asynchronous) ?150350ns t lock pll lock time time for ssclk to reach valid frequency ? ? 10 ms application circuit figure 2. application circuit diagram switching waveforms figure 3. duty cycle waveform 0.1 f vdd 1 2 3 4 oe vss ssclk vdd power cy25701 duty cycle timing (dc = t1a/t1b) t 1a t 1b ssclk notes 3. jitter is configuration dependent. actual jitter depends upon out put frequencies, spread percentage, temperature, and output load. for more information, see the application note, ?jitter in pll based systems: causes, effects, and solutions? available at http://www.cypress.com/clock/appnotes.html or contact your local cypress field application engineer. [+] feedback
cy25701 document number: 001-07313 rev. *e page 5 of 9 figure 4. output rise/fall time waveform figure 5. output enable/disable timing waveforms switching waveforms (continued) ssclk tr v dd 0v tf output rise time (tr) = (0.6 x v dd )/sr1 (or sr3) output fall time (tf) = (0.6 x v dd )/sr2 (or sr4) refer to ac electrical characteristics table for sr (slew rate) values. ssclk v dd t oe1 v il v ih output enable 0v (asynchronous) high impedance t oe2 [+] feedback
cy25701 document number: 001-07313 rev. *e page 6 of 9 informational graphs [4] spread spectrum profile: fnom=166mhz, fmod=30khz, spread%= -4% 172.5 171.5 170.5 169.5 168.5 167.5 166.5 165.5 164.5 163.5 162.5 161.5 160.5 159.5 fnominal 0 20 40 60 80 100 120 140 160 180 200 time (us) spread spectrum profile: fnom=166mhz, fmod=30khz, spread%= +/-1% 0 20 40 60 80 100 120 140 160 180 200 time (us) fnominal 169.5 169 168.5 168 167.5 167 166.5 166 165.5 165 164.5 164 163.5 163 162.5 spread spectrum profile: fnom=66mhz, fmod=30khz, spread%= -4% 0 20 40 60 80 100 120 140 160 180 200 time (us) fnominal 68.5 68 67.5 67 66.5 66 65.5 65 64.5 6 4 63.5 spread spectrum profile: fnom=66mhz, fmod=30khz, spread%= +/-1% 0 20 40 60 80 100 120 140 160 180 200 time (us) fnominal 67.5 67 66.5 66 65.5 65 64.5 note 4. the ?informational graphs? are meant to convey typical performanc e levels. no performance specifications are implied or guara nteed. refer to the tables on pages three and four for device specifications. [+] feedback
cy25701 document number: 001-07313 rev. *e page 7 of 9 possible configurations some product offerings are factory programmed customer specific devices with customized part nu mbers.the possible configuration s table shows the available device types, but not complete part nu mbers. contact your local cypress fae of sales representative f or more information. figure 6. actual marking [7] ordering information part number package description product flow pb-free CY25701FLXCT [5][7] 4-pin ceramic lcc smd -tape and reel commercial, ?20 to 70c cy25701flxit [5][7] 4-pin ceramic lcc smd -tape and reel industrial, ?40 to 85c part number package description product flow pb-free cy25701lxczzzt [6][7] 4-pin ceramic lcc smd -tape and reel commercial, ?20 to 70c cy25701lxizzzt [6][7] 4-pin ceramic lcc smd -tape and reel industrial, ?40 to 85c x* yww cy 2 5 7 01f marketing part number (cy25701) f=field programmable yww = date code (year & ww) temp pin 1 mark x = pb free l l = lcc x* zzzyww cy25701l marketing part number (cy25701) l = lcc zzz = programmable dash code yww = date code (year & ww) temp pin 1 mark x = pb free cy25701flx* cy25701lx* notes 5. ?flx? suffix is used for products progra mmed in the field by cypress distributors. 6. ?zzz? denotes the assigned product dash number. this number is assigned by the factory after the output frequency and spread percent programming data is received from the customer.for more details, contact your local cypress fae or sales representative 7. temp can be c (commercial) or i (industrial). [+] feedback
cy25701 document number: 001-07313 rev. *e page 8 of 9 package drawings and dimensions figure 7. 4-pin (3.2 x 5.0 mm) ceramic lcc package outline (001-02743) 001-02743 *d [+] feedback
document number: 001-07313 rev. *e revised march 23, 2010 page 9 of 9 all products and company names mentioned in this document may be the trademarks of their respective holders. cy25701 ? cypress semiconductor corporation, 2006-2010. the information contained herein is subject to change without notice. cypress s emiconductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress product. nor does it convey or imply any license under patent or other rights. cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement wi th cypress. furthermore, cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. any source code (software and/or firmware) is owned by cypress semiconductor corporation (cypress) and is protected by and subj ect to worldwide patent protection (united states and foreign), united states copyright laws and internatio nal treaty provisions. cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the cypress source code and derivative works for the sole purpose of creating custom software and or firmware in su pport of licensee product to be used only in conjunction with a cypress integrated circuit as specified in the applicable agreement. any reproduction, modification, translation, compilation, or repre sentation of this source code except as specified above is prohibited without the express written permission of cypress. disclaimer: cypress makes no warranty of any kind, express or implied, with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. cypress reserves the right to make changes without further notice to t he materials described herein. cypress does not assume any liability arising out of the application or use of any product or circuit described herein. cypress does not authori ze its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress? prod uct in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. use may be limited by and subject to the applicable cypress software license agreement. document history page sales, solutions, and legal information worldwide sales and design support cypress maintains a worldwide network of offices, solution center s, manufacturer?s representative s, and distributors. to find t he office closest to you, visit us at cypress.com/sales. products psoc psoc.cypress.com clocks & buffers clocks.cypress.com wireless wireless.cypress.com memories memory.cypress.com image sensors image.cypress.com psoc solutions general psoc.cypress.com/solutions low power/low voltage psoc.cypress.com/low-power precision analog psoc.cypress.com/precision-analog lcd drive psoc.cypress.com/lcd-drive can 2.0b psoc.cypress.com/can usb psoc.cypress.com/usb document title: cy25701 programmable high-freq uency crystal oscillator with spr ead spectrum (ssxo) and no spread spectrum (xo) option document number: 001-07313 rev. ecn orig. of change submission date description of change ** 442944 rgl see ecn new data sheet *a 487736 kkvtmp see ecn added industrial temp *b 1414203 dpf/ved see ecn replaced the package drawing and dimension figure on page seven and various copy edits; the reference to the software is now cyberclocks (tm) online rather than cyberclocks software. *c 2542310 aesa 07/24/08 updated template. added note ?not recommended for new designs.? added part number cy25701kflxct, cy25701kflxit, cy25701klxczzzt, and cy25701klxizzzt in ordering information on page 7. added note reference 5 to cy25701 kflxct and cy25701kflxit, and note reference 6 to cy25701klxczzzt and cy25701klxizzzt. *d 2624529 cxq/pyrs 12/18/08 removed note ?not recommended for new designs.? removed part number cy25701kflxct, cy25701kflxit, cy25701klxczzzt, and cy25701klxizzzt in ordering information on page 7. *e 2897744 cxq 03/23/2010 moved ?zzz? parts to possible configurations table updated package diagram [+] feedback
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